post for bad links (1999) Micromem 1999 News DD Page Updated 3/23/2002 DD Page Contents * PRESS RELEASE - 10/4/1999 MICROMEM ANNOUNCES BREAKTHROUGH MEMORY TECHNOLOGY 04NOV99 * (Article) Computer Business Review Six chips that will change the world NOV99 * (Article) Cahners In-Stat Group Universal Memory? 07SEP99 * (Article) Tekpress Magram Memory Technology Aug99 * (Article) InfoHQ.COM Coming Soon - Glass RAM?. 16AUG99 * (Article) Scientific American THE MAGNETIC ATTRACTION MAY99 PRESS RELEASE - 10/4/1999 MICROMEM ANNOUNCES BREAKTHROUGH MEMORY TECHNOLOGY (No Longer Available on www.micromem.com website) http://ragingbull.lycos.com/mboard/boards.cgi?board=MMTI&read=4094 (article) Computer Business Review Six chips that will change the world http://ragingbull.lycos.com/mboard/boards.cgi?board=MMTI&read=4427 Computer Business Review Volume 7 Number 11 1 November, 1999 Six chips that will change the world A new generation of computing devices is inspiring a raft of new semiconductor approaches. Gary Eastwood identifies the ones that have most potential. Roll over Pentium. The era in which a single chip architecture dominates the computing landscape - from sub-notebooks to high-end severs - is rapidly coming to an end. With the explosion of the Internet and the growing need for remote access to information, a new breed of computer devices looks set to relegate the PC to a supporting role. Indeed, according to market research company International Data Corporation (IDC), the global market for information appliances (IAs) will grow 76% between 1998 and 2002 to 55.7 million units. Conservative estimates predict that this will leap to 150 million units by 2005 - and that compares with 100 million PCs currently sold annually. It is a trend that is transforming the semiconductor industry. The plethora of next generation devices, including digital set-top boxes, mobile phones, personal digital assistants (PDAs) and handheld computers, will require chips that are low cost, consume little power and are flexible in their uses. "The challenge is balancing the complexity and the time to market and cost," says Robin Saxby, chief executive officer and president of Advanced RISC Machines (ARM). "Mobile phones, for example, need to be cheaper with more functionality." Chips that control the vast amounts of information travelling around today's overburdened networks will also need to be more intelligent and flexible, and capable of modification in situ to keep pace with rapidly changing network protocols and standards. Most chip makers are therefore moving away from general purpose chips, such as powerful processor cores designed to power ever larger and more complex PC applications, and towards specialised chips adapted for a new generation of devices. "Communication applications are going to drive the semiconductor industry for at least the next ten years," says Dwight Decker, CEO of Conexant, the recently spun off semiconductor arm of electronics contractor Rockwell. That revolution is already under way. Innovations such as complete systems on a chip (SOCs), field programmable gate arrays (FPGAs), reprogrammable network processors and chips that can be programmed directly using the Java programming language are pushing the semiconductor industry's boundaries. And helping to drive that change has been the rise of specialist chip foundry services. While such services were pioneered by Taiwanese Semiconductor Manufacturing Company in the mid-1980s, many of the semiconductor industry's largest companies - such as Intel, IBM Microelectronics, Texas Instruments and NEC - now offer silicon manufacturing to third-party chip designers. This, in turn, has fostered the growth of a band of 'fabless' specialised chip design companies - such as ARM, which makes device processor cores, and FPGA company Xilinx - that are free to focus on developing chip intellectual property. Against that background, six semiconductor architectures are now emerging that will enable a plethora of new computing devices and applications. System on a chip While chip manufacturing techniques are advancing rapidly, with performance doubling every 18 months, chip designs have been moving ahead more conservatively. That has encouraged semiconductor companies to try to shrink much of the design onto a single sliver of silicon. "The only way to [speed up the design process] is to have reusable technology such as a system on a chip," argues Eric Schutz, VP of strategic business development for French telecoms equipment manufacturer Alcatel. In the past few years, the initial definition of a SOC - a single chip containing a computing engine, memory and logic - has been extended to include, for example, wired communication applications, such as modems, video and audio processors, and wireless components, such as radio frequency controllers. Though the technical barriers in terms of design and manufacturing are formidable, the SOC approach ultimately cuts cost. By reducing the number of overall chips in a device, communication between elements on the chip is improved and performance enhanced. Reduced energy consumption also makes SOCs attractive for battery-powered devices. The initial SOC devices are only now emerging. In July, chip design company National Semiconductor unveiled the first complete SOC for use in a TV set top box. Geode SC1400, set for production early next year, integrates five components. The chip is driven by National's multimedia x86-based processor core, MediaGX, with an MPEG2 video decoder, and contains an audio processor and a TV encoder. The SC1400 is just the first in a family of Geode chips, which National will aim at three specific IA markets: set top boxes, thin clients (such as Windows CE-based and point-of-sale devices), and personal Internet access devices. "The desktop computer has been a great device and the key reason for the Internet taking off," says Adam Silver, marketing manager for Geode at National Semiconductor. "But the Internet has created a bunch of new applications that are very specific in function and will require very focused devices for the delivery of information." In the digital set top box market alone, analysts predict sales of 250 million units by 2003. The rush to grab share in the SOC market is already well under way. In February, Samsung Semiconductor announced a partial SOC, containing a core processor, and memory and modem functionality, optimised for use in mobile devices. In October, Galileo Technology launched the GT-96100 chip, a complete networking router on a single piece of silicon. And in May, Lucent Technologies' microelectronics group unveiled an Internet telephone on a chip. "The Internet telephone market has been limited so far by prices that hover at about $250 a phone," says Greg Sheppard, analyst at market research group Dataquest. But Lucent's new chip, he says, will push these phones under $150 each. Re-programmable chips While field programmable gate array (FPGA) chips have been around for a decade or so, advances in design and production processes have only recently enabled vendors to cram enough logic gates onto a chip to begin to realise their potential. FPGAs consist of millions of logic gates - made up of clusters of transistors - that can be reconfigured to perform different tasks by reprogramming the pattern of connections between the gates. Although their primary use to date has been for prototyping chip designs, the holy grail of FPGA technology is to produce a single device that can be dynamically reconfigured. So a device can be made to act one minute as a mobile phone, for example, then the next as a handheld computer or a radio (see box, Raw computing). RAW computing The Oxygen project, at the MIT Laboratory for Computer Science, is an attempt to make computation as freely available as air. And a major part of that strategy is the RAW chip - so called because it exposes the hardware on a chip directly to software. According to Anant Agarwal, head of the RAW project, in the near future chips will contain billions of logic gates, but if they stick with today's architectures chip developers will hit a brick wall in terms of complexity, speed and energy efficiency. The RAW chip is an attempt to define a new architecture in which a software compiler uses logic gates - the building blocks of chips - to reroute information along a chip's wires in a particular way according to the desired application. The RAW chip contains an array of logic gates, or tiles, each one incorporating a switch that controls the way that tile's wires interconnect with adjacent tiles. On request for an application, for example a mobile phone, the software compiler searches a memory unit to find the appropriate gate configuration and then re-programs the switches on the tiles to interconnect the wires in the particular pattern that makes the chip function as a phone. At the same time, each tile is multiplexed - a way of using one wire to carry a number of different signals, albeit during separate clock cycles - so that RAW's wires can carry more signals than an ordinary chip. This new architecture could potentially help to create a single device - fancifully dubbed "the Handy 21" by the MIT team - that could be reprogrammed automatically to adopt the functionality of multiple applications. So, for instance, a device acting as a mobile phone could be reconfigured into a games machine on command from the user. The MIT team has already compiled a software radio application that gives a PC the ability to re-set itself as an FM radio. Commercial applications are many years away. But the impact of such technology, if it proves feasible, could be far-reaching. "If successful, the RAW chip could become a universal logic chip - a replacement for both general purpose and application specific microprocessors," says Agarwal. Today, FPGAs are still too expensive to produce in high volumes for consumer products. But the current market, at $4 billion, is hardly insignificant. Because FPGAs are reconfigurable, chip developers can use them to test large numbers of chip designs before burning the chosen one in silicon. This reduces time to market and avoids costly design mistakes or alterations that can add months to the design cycle. "FPGAs are an integral step on the pathway to validating SOC designs," says Alcatel's Eric Schutz. Market leaders in this area, notably Xilinx and Altera, are reaping the benefits with both companies boasting 1998 revenues approaching $700 million. Xilinx's Virtex and Altera's APEX chip families contain 50,000 to 3.2 million logic gates and up to 200 million transistors on a single chip. The next step is to combine SOC and FPGA designs, as vendors advance towards the single reprogrammable device. But for now FPGA chips need to be cheaper. "For large volumes, they are not yet cost-effective for the consumer market," says Schutz. Network controllers The convergence of voice, data and video applications and the increase in network traffic on the Internet are shaping the development of next-generation network chips that power switches and routers and manage network transactions while dynamically and effectively allocating and prioritising bandwidth. So-called network processors (NPs) look set to provide a leap in performance and flexibility. Networking companies - Cisco, Nortel and others - have for years developed application-specific devices and software to control network functions such as bandwidth management, policy implementation and security. But any changes to these functions, or the emergence of new industry standards and protocols, requires complicated software upgrades or, more commonly, costly hardware replacement. What is more, predicting silicon requirements in advance of an 18-month design cycle in a constantly fluctuating network environment is no trivial task. But network processors (NPs) might not only provide improved performance - as most of the functions previously performed by network software are hardwired into the chips - but also be software reprogrammable so that users can alter, for example, network policies, or add new protocols through a programmable interface. Above all, that will significantly increase product lifespan and reduce cost of ownership. In September, IBM launched its Network Processor (formerly codenamed Rainier), a single chip that can handle many services - such as load balancing, traffic prioritisation, policy management, and firewall and security provision - previously all functions performed by a mixture of switches, routers and network application servers. While the chip is currently programmed on the factory floor, in the near future IBM hopes that it will become field, or in-system, programmable. The IBM NP has two million electronic gates and three megabits of memory and can handle Ethernet and frame relay traffic, as well as asynchronous transfer mode (ATM) packets. According to IBM, the chip started shipping in October to telco and data switching OEM customers including Alcatel, Newbridge Networks and Nortel Networks. And with analysts predicting that networking chip unit sales will grow from 28 billion this year to 90 billion in 2005, many vendors are attempting to develop their own NPs. For example, days after the IBM launch, Intel unveiled its new IXP1200 NP chip, gained from its recent $2.2 billion acquisition of networking chip vendor Level One Communications. "The Internet is causing companies to reassess the role that the network plays in their business," says Dr Robert Pepper, general manager at Level One. "In ebusiness and the Internet economy, companies need flexible networks that can evolve as their business evolves." The IXP1200 can switch 2.5 million packets of information a second and contains a reprogrammable network engine consisting of ARM's StrongARM processor core and a programmable interface. Intel expects to sell the chip to telco and networking equipment manufacturers, such as Lucent, Nokia and Ericsson. According to market research company Forrester, NPs decrease time to market, prolong product lifespan and reduce hardware development risk, as alterations can still be made after chip designs are set in silicon. "By the end of 2000, users should refuse to purchase network equipment that isn't fully programmable," says Charles Rutstein, senior networking analyst at Forrester. Majc Java Chips Growing consumer demand for multimedia applications, the proliferation of Sun Microsystems' Java programming language, and increasing bandwidth availability have also driven chip innovation in the guise of Sun's "microprocessor architecture for Java computing", or MAJC chip, unveiled in October. Engineering samples of the first version of the chip, MAJC 5200, are expected by the middle of next year. It is expected to contain multiple processor units, each one acting as a parallel processing system, performing multiple instructions simultaneously. This will make the chip ideal for handling large amounts of multithreaded data, such as multimedia documents. For instance, says the company, within a few years it could be possible to produce animated sequences for a computer-generated film, like Disney's Toy Story, in real time using a single MAJC chip, something that currently takes numerous graphics workstations several weeks. The real benefit of the MAJC 5200 chip, however, is that it can be programmed directly using Java and deliver applications from a MAJC server to devices running Java Virtual Machine software. With millions of Java developers globally, Sun hopes this will ensure a wide variety of applications for MAJC, including interactive television, 3D animation, digital telephony and set top boxes. Java-based chips will remove the need for interface and application software on devices, says Hellmuth Broda, European chief technology officer at Sun. They will form the platform for breakthroughs in value-add Internet-based services, he argues. "This technology provides a mechanism for transporting services over the Internet anywhere in the world without the need for both users to be running the same software." Next generation memory The expected proliferation of handheld information appliances is driving the need for a new generation of low power, low cost, stable and rewritable memory chips, because existing technologies, such as dynamic random access memory (DRAM), static RAM (SRAM), read only memory (ROM) and Flash memory, all have inherent drawbacks. In August, Toronto-based memory technology company Micromem Technologies unveiled its ferromagnetic-based MAGRAM memory chip which, Micromem claims, retains all the advantages of existing memory technologies, but not the disadvantages. Although DRAM - used in PCs - is relatively fast and inexpensive, it only holds data for thousandths of a second, requiring 'refresh', a considerable drain on device power. Both DRAM and SRAM are volatile, meaning that data is lost once the device is turned off, while flash memory, which is used in today's mobile devices, is non-volatile and fast. However, flash is relatively expensive and slow, as well as cumbersome to write to. The MAGRAM chip, in contrast, uses ferromagnetic rods and sensors in a glass substrate to hold data even when the power is switched off for months or years. The chip has a data access rate of 5 nanoseconds (compared with Intel's fastest flash memory read speed of 120 nanoseconds). What is more, the use of glass substrates, claims the company, halves the number of steps in the chip manufacturing process making it significantly cheaper than existing memory technologies. It could even offer alternative and cheaper ways to make other chips, the company argues. Micromem is talking to several vendors about developing the technology and believes that it will replace flash memory and SRAM in mobile phones and other battery-powered devices in coming years. In the same vein, scientists at Hitachi's Cambridge Laboratories have developed PLEDM (phase-state low electron-hole number drive memory), a high-capacity memory chip capable of storing all the images and sounds from an entire movie. Announced in May, the PLEDM chip is as small as a single transistor and has a read/write time of 10 nanoseconds. Using a revolutionary technology to fuse a transistor onto the gate of another transistor, the team has created a memory cell with similar attributes to the MAGRAM, that has a low power consumption and fast read/write performance. Capacity is currently in the megabit range and full production could still be as much as five years away. "Because of its long memory retention time and faster access time, the PLEDM chip is much better than flash memory," says Dr David Williams, group leader of the PLEDM project at the laboratories. His group is confident that the technology could replace today's data storage devices, such as PC hard disk drives, as well as replace flash memory in handheld devices. But both technologies will have to displace flash memory in a burgeoning market. Analysts expect the global market for flash memory chips to expand from 500 billion ($4.7 billion) in 1999 to 1.5 trillion ($14 billion) in 2001. Clockless processors While most advances in processor design continue to build on current methods, a few research groups around the world are looking to develop an alternative approach to building chips using asynchronous technology. Today's chips use a synchronous approach, so that within every chip a clock dictates the speed at which all the instructions are performed. Whenever the clock reaches the end of a cycle, typically in the hundreds of megahertz range, all the logic gates or sets of transistors, perform an instruction at the same time. So, for example, if the clock speed could be doubled, then the chip would work at twice the speed. The disadvantage of this process is that even those chip components that are not doing any useful work at any particular cycle are also forced to change state, unnecessarily wasting power. At the same time, because all of the chip operations are in phase, each cycle produces a large peak of electromagnetic interference which could be harmful, for example, to sensitive wireless appliances. (Article) Cahners In-Stat Group Universal Memory? http://www.instat.com/insights/semi/1999/universal9799.htm Cahners In-Stat Group Universal Memory? September 7, 1999 By Steve Cullen, Principal Analyst, Memory Services MicroMEM Technologies of Santa Fe NM has developed a technology that they say could become the long, sought after, universal memory device. The MAGRAM is described by microMEM as the worlds 'first non-volatile, random read/write access memory technology'. They see it as the universal replacement for DRAM, SRAM, and Flash. The technology seems simple enough. The basic storage cell is a rod of magnetic material that can be written by sending a current pulse through an adjacent conductor. The cell is read by sensing the magnetic polarity of the rod, using a plate that is also adjacent to the rod. The rod, conductor and sensor plate are deposited on any one of a number of materials using standard semiconductor processing techniques. Since the process has fewer steps than semiconductor memory processing, fab cost is said to be lower. At this time, the method of connecting the individual cells into an array is unclear, but the company says that a number of alternative methods are possible and that the resulting device would be compatible with today's logic interfaces. The technology has recently been demonstrated in the form of an 8 bit sample produced on a glass substrate for microMEM by a research team at the University of Utah. An evaluation by Allied Signal found the sample to be fully functional. If larger arrays are capable of matching DRAM speeds while maintaining non-volatility as microMEM claims, the device will be worth watching. However, the memory landscape is littered with 'better mousetraps' that never quite made it (anyone remember plated wire or bubbles?). Many of these technologies have suffered from the cost/volume version of the chicken/egg problem. Without high volume it is very difficult to achieve competitive cost. But without competitive cost, volume will just not happen. Using the DRAM world as a guide, it has taken about 10 years for recent major changes to progress from the technology concept stage to market dominance (Rambus started in 1990, and is not there yet). So, while we don't expect to see MAGRAM in a PC near you any time soon, we will be keeping an eye on this developing technology. - Steve Cullen, Principal Analyst, Memory Service (Article) Tekpress Magram Memory Technology http://www.tekpress.com/Archives/1999/Aug/magram.html Magram Memory Technology August 1999 By Bob Lindquist In every personal computer, there are three types of memory: Read-Only Memory, or ROM; Random Access Memory, or RAM; and disk-based storage, like hard drives or floppy disks. Each has its failings: ROM can't be changed, RAM is expensive and needs constant refreshing, and hard drives - the fastest of all long-term storage devices - are slow. But a company named Pageant is developing a memory technology that may supplant all three. This technology, called magram, will have the speed of RAM, the stability of ROM, and potentially, capacity far greater than a hard drive's. Magram is so revolutionary, it has attracted attention from magazines such as Scientific American and Popular Science, for a unit of magram may eventually become the sole memory bank of a computer. In a standard RAM or ROM chip, the bits - pieces of data, either ones or zeros - are held by transistors, tiny electrical devices whose bit is read as "1" if they conduct a charge and as "0" if they do not. In hard drives, floppy disks, and other magnetic storage devices, bits are stored as a series of magnetic bands that are either different in polarization from the preceding band (to denote a 1) or of the same orientation (to denote a 0). But magram operates differently from conventional memory technology: in a magram cell, electrical currents are deflected by magnets to distinguish ones from zeros. The purely magnetic nature of magram allows magram chips to be built not only on silicon, as are established memories, but on glass or maybe even plastic, reducing the potential cost of magram chips. But how does magram stack up against other memories in terms of functionality? ROM can't be overwritten; it is a read-only memory designed to hold the basic operating instructions for a computer. (A tangential yet interesting technical note: in more recent computers, like the iMac, computer designers have made the ROM essentially upgradeable by programming ROM to copy its contents into RAM upon startup and be thereby subject to performance-enhancing modifications.) ROM is stable, however, and does not require power that rejuvenates its data, for the information in ROM is "hard-wired" into the chip. Magram, which can be overwritten, matches ROM's longevity, even without power. DRAM (dynamic RAM, found in personal computers and servers) is the densest memory chip in use today, and, aside from static RAM, is also the fastest. (Static RAM, or SRAM, is expensive, so it can only be used in small quantities; it is found in personal computers in the level 2 cache. Since magram is about as fast as SRAM and is denser and not volatile, magram could replace SRAM.) But to maintain data, RAM requires constant refreshing, which wastes power and heats the chip up, and in a power failure, all of RAM's contents are erased. Magram, on the other hand, is not nearly as volatile, as it doesn't require refreshing. And prototypes of magram have achieved speeds faster than DRAM's - access times for read and write operations are five nanoseconds, which is one-twelfth the times for DRAM. In fact, it is claimed that magram chips can read and write simultaneously. The biggest advantage of disk-based storage, like hard drives, is that it is incredibly dense: billions of bits are found in every square inch of the latest hard disks. But hard drives are thousands of times slower than memory chips, and, as fragile, heavily-used mechanical devices, are also prone to failure. Magram does not fail, and is far faster than hard drives. Given time, Pageant may create magram chips as dense as hard drives; sooner, magram chips could replace Zip drives and other removable backup media, although Pageant doesn't plan to make such chips. In fact, because magram serves the function of all three major memory types, it's not unlikely that all the memory functions of a computer could be combined into one bank of magram. Here's how: One section of the magram bank would contain the basic operating procedures of the computer - as a surrogate ROM, if you will. This would be just as stable as ROM, for Magram's contents are etched in stone until a "write" signal is received. In fact, magram chips have retained data successfully without any power at all - they are no more likely to fail than current ROM chips, and are faster too. This non-volatility is the most compelling aspect of magram. Another section of the main magram bank would be devoted to long-term file storage - a substitute hard disk but thousands of times faster. In effect, the magram bank would serve as a gigantic RAM disk. The third section would be devoted to immediate memory use. (Since the "hard disk" and "main memory" would here be part of the same memory bank, the unification of memories by magram would provide a unique virtual-memory scheme that would not compromise performance.) This immediate-memory-use section would contain a portion devoted to video operations (like the memory on a graphics card) and a portion devoted to storing other information in current use, such as a running web browser or word-processing document. Magram is a memory technology with awesome potential, as it combines the strengths of RAM, ROM, and hard drives with none of their flaws. Indeed, its flexibility could provide a means to merge all memory units together inside a computer, and to further the integration of processor and memory. This unification of memory and chip would be a fantastic technological achievement, as the speed and reliability of computing would be greatly improved. And even if that advancement is not to pass in the immediate future, the versatility and power of magram technology should certainly benefit us all. (Article) InfoHQ.COM Coming Soon - Glass RAM?. http://www.infohq.com/Computer/computer-news-Aug16-31.htm August 16 - Coming Soon - Glass RAM?. Micromem Technologies Inc. announced today that it has successfully tested a new type of RAM that is made from "simple glass substrates" and that is also non-volatile (retains data after power is turned off) known as MAGRAM. Not only did samples display the sought-after non-volatility, but MAGRAM technology digital memories can surpass DRAM write/read speeds. The samples represent a technology which does not require the exotic, time-consuming and expensive processes used to fabricate semi-conductor memories (DRAMs, ROMs, Flash, etc.). Richard Lienau the inventor stated that, "Based on linear projections of the research to date, samples of Type II MAGRAM(TM) technology digital memories are expected to exceed current technical parameters for all manner of digital memories, including the ubiquitous DRAM, even in the density arena." (article) Scientific American THE MAGNETIC ATTRACTION http://www.sciam.com/1999/0599issue/0599infocus.html Scientific American THE MAGNETIC ATTRACTION A long race to create faster memory chips that never lose data yields prototypes at last May 1999 By W. Wayt Gibbs Laurence P. Sadwick was skeptical two years ago when a mild-mannered inventor from Pecos, N.M., brought him a novel design for a computer memory chip. The inventor, Richard M. Lienau, and the start-up firm that he had found to back him, named Pageant Technologies, made remarkable claims. These new chips, they said, could hold data even when the power went out--for many years, if need be. They would work five to 10 times faster than the so-called dynamic random-access memory (or DRAM) chips used in computers today. Yet the new chips should cost no more to make: only minor changes to existing production lines were needed. The secret ingredient that made all this possible, Lienau said, was an array of minuscule magnets. "I gave them a hard time. I didn't trust them," recalls Sadwick, an electrical engineer at the University of Utah. After all, academic groups had tried since the mid-1980s to replace the capacitors that record information in DRAM with micron-size bits of ferromagnetic metals such as alloys of iron, nickel and cobalt. Capacitors lose their charge--and their data--unless they are refreshed every few milliseconds. Magnetic films, on the other hand, don't suffer such amnesia, which is why hard disks are coated with them. But it is one thing to measure tiny magnetic fields as they pass beneath a single moving head, as disk drives do. Building a sensor right next to each one of millions of magnetic bits is much harder. In recent years, major manufacturers, including IBM and Motorola, had joined the search (and in February, Hewlett Packard announced it would, too). But the only company ever to produce commercial magnetic RAM chips was Honeywell, and in 1997 its best devices were still 10 times slower, 256 times less dense and far more expensive than DRAMs. Nobody else even had prototypes. Yet after a careful analysis of Lienau's idea, Sadwick decided that it might just work, and he set about building experimental versions. His timing was right on: Pageant is now a contestant--albeit a dark horse--in what has become a heated race to introduce a magnetic memory fit enough to challenge DRAM and perhaps eventually to replace it. In the past few months, at least five competing research teams have produced working prototypes of single-bit magnetic memory cells. All are aiming for the same three goals. First is to make cells at the mi- cron scale that are compatible with existing production lines so that the devices can be as cheap as DRAM. Second, the new chips should require as little power as possible, because the greatest need for permanent memories is in battery-powered gadgets such as portable phones and smart cards. The last goal is speed: today's DRAMs can fetch or store data in 60 nanoseconds. Magnetic RAM should ultimately do better. In the near term, "we would just be happy to get a toehold in the market," comments Mark B. Johnson, a physicist at the Naval Research Laboratory. "That could probably happen within two years," he says, if magnetic memories can shoulder out Flash RAM and so-called EEPROMs, the two leading forms of permanent semiconductor memory. "They are vulnerable because they are really slow: writing data can take tens of microseconds, and erasures take up to a second," Johnson observes. Both kinds of chips require high power and wear out after less than a million write operations. "Even so, that is a $5-billion-a-year market," he adds. Magnetic memories will also compete with ferroelectric devices, in which a 0 or 1 is recorded by changing the position of atoms in a crystal. Ramtron in Colorado Springs recently produced 64-kilobit versions that the firm claims are nearly as fast as DRAM and last for years. But it has apparently failed to convince many customers, because sales fell in 1998 and the company continues to lose money. The magnetic RAM teams have divided along scientific lines to pursue three distinct approaches. Of these, the most mature and thoroughly studied is based on a principle discovered only 10 years ago: a phenomenon called giant magnetoresistance (or GMR), in which a magnetic field changes the electrical resistance of a thin metal film by up to 6 percent. Honeywell has exploited this effect in experimental chips that contain more than one million bits, according to James Daughton, president of Nonvolatile Electronics in Eden Prairie, Minn. Unfortunately, GMR devices consume so much current that their transistors burn out if shrunk to the submicron sizes that market economics demand. But a group led by Saied Tehrani at Motorola's research center in Tempe, Ariz., believes it has found a way around this problem with a device called, for historical reasons, a pseudo-spin valve. The design roughly doubles the strength of the GMR effect, alleviating the need for such high power. Tehrani reported in November that his team has successfully built eight-by-eight-bit arrays on top of standard transistor circuitry, which allowed them to write and read each memory cell independently. IBM researchers lead the assault on the second front, devices that exploit electron tunneling through a thin insulator, although Motorola is working on such chips as well. The faint tunneling current varies by as much as 30 percent, depending on whether the fields of two neighboring magnets are aligned or opposite. In March a team of IBM engineers led by William J. Gallagher and Stuart S. P. Parkin announced that it had constructed arrays of 14 bits from such tunnel junctions, as they are known. They have demonstrated bits that are as small as 200 nanometers wide and that switch in five nanoseconds or less, Gallagher reports. Manufacturing masses of tunnel junctions may be tricky, however. The device is exquisitely sensitive to the depth of its thinnest layer, a plane of aluminum just 0.7 nanometer--about four atoms--thick. Any pinholes in that spread can short-out the memory cell. Moreover, both pseudo-spin valves and tunnel junctions develop flaws at temperatures above 300 degrees Celsius. Chip fabrication lines routinely run 100 degrees hotter. Those uncertainties may leave an opening for a third approach that has less money behind it, but more history. Edwin Hall discovered 120 years ago that a current moving through a thin film is deflected to one side by a magnet. Lienau's "magram" device exploits this effect, as does a similar design of Johnson's called a Hall effect hybrid memory. Theoretically, both designs should be easier to manufacture than spin valves or tunnel junctions. They tolerate heat well. And Johnson notes that his design requires only half as many etching steps as DRAMs. Moreover, "unlike all other memories, [magram] can be deposited on glass--perhaps even plastic--instead of single-crystal silicon," Sadwick claims as he shows, during a visit by Scientific American, a glass slide covered in gold wires leading to a one-millimeter-square array of Hall effect sensors. That versatility should allow the memory to be cheap even if it cannot shrink to the submicron cell sizes of its competitors, he argues. With single cells already working, Sadwick says, "I see no reason why we can't get eight-bit commercial samples this year." Johnson, meanwhile, has turned over his design to Honeywell, which has built one-micron test devices on gallium arsenide. "They can write bits in eight nanoseconds," he reports. The next generation, he says, will be smaller, faster and made atop silicon, the industry standard for microchips.
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